The present invention relates to a device for decoding a variable length code, and more particularly to a variable length code decoding device that is capable of suppressing a table memory size which is used in decoding compressed data by the aid of a variable length code.
Japanese Patent Application Laid-Open Publication No. 2003-309471 discloses a method in a related art of the present invention. In Japanese Patent Application Laid-Open Publication No. 2003-309471, attention is paid to a common bit of variable length code words when referring to a table for decoding, and bits that are brought from the variable length codes and referred to are limited to a certain bit length (m bits) in one decoding process table reference. In a code word that is made up of m bits or more, only the common bit portion at an MSB side is processed once so as to reduce one decoding process table size down to 2m entries which are the number of entries corresponding to m bits. In a portion of the code word subsequent to the common bit, another decoding process table corresponding to a portion after the common bit is referred to, and the decoding process is continued to complete the decoding operation. In this situation, even in second and subsequent decoding process table references, when the code word portion used for the table reference, that is, a portion after the bit that is dealt with as the common bit in the previous table reference is equal to or larger than m bits, the subsequent table reference is repeated at a portion of the code word portion from which the common bit at the MSB side is removed to complete the decoding process.